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NI USRP X300 radio

summarize

The Ettus Research USRP X300 is a high-performance, scalable software-defined radio (SDR) platform for designing and deploying next-generation wireless communication systems. The hardware architecture will include two slots for extended bandwidth subboards covering DC-6 GHz, baseband bandwidth up to 160 MHz, multiple high-speed interface options (PCIe, dual 10 GigE, dual 1 GigE), and a large user-programmable Kintex-7 FPGA Integrated in a convenient desktop or rack-mounted half-width 1U form factor. In addition to delivering best-in-class hardware performance, the X300's open source software architecture provides cross-platform UHD driver support, making it compatible with a large number of supported development frameworks, reference architectures, and open source projects.

Operating system

Linux operating system

window

Development framework

GNU radio

Xilinx Vivado 2015.2 Design kit

Table 1: Operating system, development framework, and reference application

High performance user programmable FPGA

At the heart of the USRP X300, the XC7K325T FPGA provides high-speed connectivity between all major components within the device, including the radio front end, host interface, and DDR3 memory. The default FPGA kernel provided by UHD provides all functional modules for digital down-conversion and up-conversion, fine-tuning frequency, and other DSP functions, making it interchangeable with other USRP devices using the UHD architecture. The large Kintex-7 FPGA provides developers with additional space to integrate custom DSP modules and is compatible with a large number of USRP-supported development frameworks, reference architectures, and open source projects.

USRP N210

USRP X300 series

USRP X310 series

FPGA technology

Spartan 3 XC3SD3400A

Gintex 7-325T

Gintex 7-410T

Logical unit

53 km race

328 km race

406 km race

memory

2,268 Kb

16,020 KB

28,620 Kb

multiplier

126

840

1540

Clock frequency

100 megahertz

200 megahertz

200 megahertz

Stream bandwidth per channel (16 bits)

25 milliseconds per second

200 milliseconds per second

200 milliseconds per second

Table 2: FPGA resource comparison

Multiple high-speed interface options

The USRP X300 offers a variety of interface options. Out of the box, 1 GigE provides a convenient way to get started. For extended bandwidth and low-latency applications such as PHY/MAC research, PCIe x4 provides an efficient bus for deterministic operations. 10 GigE interface options best meet applications that use network loggers or multiple processing nodes.

Additional features - GPSDO, GPIO, 1 GB DDR3, Sync

The X300 includes a number of additional features to aid in wireless system development. On-board 1GB DDR3 is flexibly accessible through an FPGA reference design, supplementing FPGA resources with buffering and data storage memory. The optional internal GPSDO provides a high-precision frequency reference, and when synchronized with the GPS system, the global timing alignment can be within 50 ns. External GPIO connectors allow users to control external components (such as amplifiers and switches), accept inputs (such as event triggers), and observe debug signals. The USRP X300 also includes an internal JTAG adapter that allows FPGA developers to easily load and debug new FPGA images.

trait

Two wide-band RF subroutine slots

Each bandwidth up to 160MHz (broadband versions of UBX, CBX, WBX, SBX)

Daughter board selection covers DC to 6 GHz

Large customizable Xilinx Kintex-7 FPGA for high-performance DSPS (XC7K325T)

Multiple high-speed interfaces

Dual 10 Gb Ethernet - 2 receivers, 200 MSP per channel

Dual 10 Gb Ethernet - 4 receivers, 80 MSP per channel

PCIe Express (Desktop) - 200 MS/s full duplex

ExpressCard (Laptop) - 50 MS/s full duplex

Dual 1 Gb Ethernet - 25 MS/s full duplex

UHD architecture is provided with

GNU radio

C++/Python API

Amarisoft LTE 100

OpenBTS

Other third-party software and frameworks

Flexible clock architecture

The sampling clock can be configured

Optional GPS training OCXO

Use OctoClock and OctoClock-G for coherent operations

Compact and robust half-width 1U form factor for easy desktop or rack mounting

Digital I/O is accessible on the front panel for custom control and interface of the FPGA

NI USRP X300 radio

NI USRP X300 radio

NI USRP X300 radio

NI USRP X300 radio

NI USRP X300 radio